发明名称 |
Substrate processing apparatus and substrate processing method |
摘要 |
<p>Thermal processing unit sections each with ten tiers and coating processing unit sections each with five tiers are disposed around a first main wafer transfer section and a second main wafer transfer section, and in the thermal processing unit section, the influence of the time required for substrate temperature regulation processing on a drop in throughput can be reduced greatly by transferring the wafer W while the temperature of the wafer W is being regulated by a temperature regulation and transfer device. <IMAGE></p> |
申请公布号 |
EP1094501(B1) |
申请公布日期 |
2007.02.28 |
申请号 |
EP20000309179 |
申请日期 |
2000.10.18 |
申请人 |
TOKYO ELECTRON LIMITED |
发明人 |
UEDA, ISSEI;HAYASHI, SHINICHI;IIDA, NARUAKI;MATSUYAMA, YUJI;DEGUCHI, YOICHI |
分类号 |
H01L21/00;H01L21/02;G07C9/00;G08G3/00;H01L21/677 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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