| 摘要 |
Electronic memory apparatus, and method for deactivating redundant bit lines or word lines An electronic memory apparatus ( 100 ) having a memory cell array ( 101 ), a column address decoding unit ( 102 ) for decoding a column addressing signal ( 105 ) and for actuating an addressed bit line in the memory cell array ( 101 ), a column redundancy activation unit ( 103 ) for activating a redundant bit line when a currently used bit line has been determined to be faulty during testing of the memory apparatus ( 100 ), a row address decoding unit ( 202 ) for decoding a row addressing signal ( 205 ) and for actuating an addressed word line in the memory cell array ( 101 ), and a row redundancy activation unit ( 203 ) for activating a redundant word line when a currently used word line has been determined to be faulty during testing of the memory apparatus ( 100 ). A column deactivation unit deactivates unused, redundant bit lines and those bit lines which have been determined to be faulty during testing of the memory apparatus, and a row deactivation unit ( 204 ) deactivates unused, redundant word lines and those word lines which have been determined to be faulty during testing of the memory apparatus ( 100 ).
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