发明名称 |
Rijwielframe met meerlaags buis. |
摘要 |
The circuit has a set of memory cells connected in series between a ground line and a bit line. A resistance memory unit (3) has an anode electrode and a cathode electrode, and a drive transistor is connected with the unit. A pair of changeover switch is arranged respectively at one end of the series of memory cells alternately to produce a connection between the series-connected memory cells and the ground and the bit lines. Independent claims are also included for the following: (A) a method for accessing a set of memory cells connected in series between ground lines (B) a memory device comprising a set of memory cells connected in series between ground lines. |
申请公布号 |
NL1032355(A1) |
申请公布日期 |
2007.02.27 |
申请号 |
NL20061032355 |
申请日期 |
2006.08.22 |
申请人 |
GIANT MANUFACTURING CO., LTD. |
发明人 |
SIMON I;KUN-HSI WANG |
分类号 |
B62K19/02;B62K3/02;B62K19/06;B62K19/16 |
主分类号 |
B62K19/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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