| 摘要 |
A method and program for capacitance extraction enabling reduction of the need for division into segments during extraction of capacitances in an LSI device having diagonal wires, so that increases in the number of processes for capacitance extraction can be suppressed are provided. In the method and program, a wire model is generated in which, for a wire segment such that the wire of interest and an adjacent wire are not parallel, either the wire of interest or the adjacent wire is replaced so as to be parallel to the other, and the capacitance of the wire of interest is extracted for this wire model, so that the number of processes in the capacitance extraction process can be reduced.
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