| 摘要 |
To provide a method for the self-testing of a reference voltage in electronic components, by means of which method there is defined a circuit arrangement for a self-test of the reference voltage that can be implemented in the form of an on-chip test, i.e. for which no external reference-voltage source is required, provision is made for the reference voltage <SUB>(Uref) </SUB>to be the variable of a function f(U<SUB>ref</SUB>) that has an extreme at the point where the selected nominal value (U<SUB>ref.test</SUB>) of the reference voltage (U<SUB>ref</SUB>)is situated and, in a self-test, for the values of the function to be determined in succession for the reference voltage (Uref) and for two further test voltages (U<SUB>ref</SUB>+DeltaU<SUB>ref</SUB>; U<SUB>ref</SUB>-DeltaU<SUB>ref</SUB>) that differ from the reference voltage (U<SUB>ref</SUB>) by only small positive and negative amounts (+DeltaU<SUB>ref</SUB>; -DeltaU<SUB>ref</SUB>)respectively and for these values to be compared with one another and, if the values of the function for the test voltages (U<SUB>ref</SUB>+DeltaU<SUB>ref</SUB>; U<SUB>ref</SUB>-DeltaU<SUB>ref</SUB>) differ from the value of the function for the reference voltage (U<SUB>ref</SUB>) in the same direction, for a pass signal to be generated, or if not, for a fail signal to be generated.
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