发明名称 Signal processing system with analog-to-digital converter using delta-sigma modulation having an internal stabilizer loop
摘要 A signal processing system includes an analog-to-digital delta sigma modulator with a duty cycle modulator and a finite impulse response (FIR) filter in a main loop feedback path of the delta sigma modulator. The duty cycle modulator and FIR filter can provide high performance filtering in the main loop feedback path. To prevent instability in the main loop caused by the duty cycle modulator and FIR filter, the delta sigma modulator also includes a stabilizer loop. Transfer functions of the main loop and the stabilizer loop combine to achieve a target transfer function for the analog-to-digital delta sigma modulator that provides for stable operation of the analog-to-digital delta sigma modulator.
申请公布号 US7183957(B1) 申请公布日期 2007.02.27
申请号 US20050323671 申请日期 2005.12.30
申请人 CIRRUS LOGIC, INC. 发明人 MELANSON JOHN L.
分类号 H03M3/00 主分类号 H03M3/00
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