发明名称 Charge pump circuit with latch-up prevention
摘要 In an embodiment of the invention, a charge pump circuit has a latch-up prevention circuit. The latch-up prevention circuit has a depletion P-channel MOS transistor and a resistor serially connected with each other between a negative output terminal and a ground terminal. A first bidirectional PNP-transistor is connected between a back gate of the depletion MOS transistor and the ground terminal. A second bidirectional PNP-transistor is connected between the back gate of the depletion MOS transistor and the negative output terminal. A third bidirectional PNP-transistor is between the ends of the resistor to bypass it. The base of the first bidirectional PNP-transistor is connected to the negative output terminal, the gate of the depletion MOS transistor and the bases of the second and third bidirectional PNP-transistors are connected to the ground terminal.
申请公布号 US7183837(B2) 申请公布日期 2007.02.27
申请号 US20040017854 申请日期 2004.12.22
申请人 NEC ELECTRONICS CORPORATION 发明人 FUJIWARA HIROFUMI
分类号 G05F3/16;H02M3/155;G05F3/02;H02M3/07 主分类号 G05F3/16
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