| 摘要 |
#CMT# #/CMT# The memory has a data memory with banks having a set of data words, where a data word is localized by bank and set addresses. A decoder extracts the addresses and an indicator from a read request of the word. A verifying circuit verifies whether the indicator is present in an indicator table and produces an associated line address. Bank and line selectors (130, 140) and read amplifiers (1501-150n) select and read a bank word stored at the set address, and multiplexers (1601-160n) extract the data word from the read bank word. #CMT#USE : #/CMT# Used as a buffer between a processor and a main memory in an electronic circuit for storing a part of information stored in the main memory. #CMT#ADVANTAGE : #/CMT# The multiplexers extract the data word from the read bank word without requiring any clock cycle. The bank and line selectors and the read amplifiers select and read the bank word stored at the set address, thus eliminating a need for the line address for accessing the data memory and reading the bank word so that the indicator table and the data memory can be accessed simultaneously, while ensuring the verification of the indicator in the table, the reading of the bank word and the extraction of the data word during a single clock cycle which cadences the functioning of the cache memory. The cache memory therefore requires the single clock cycle for simultaneously reading several data words in the data memory. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a block diagram of a cache memory. 130 : Bank selector 140 : Line selector 1501-150n : Read amplifiers 1601-160n : Multiplexers `(Drawing contains non-English language text)`. |
