发明名称 |
Digital communication system |
摘要 |
<p>Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.</p> |
申请公布号 |
HK1055862(A1) |
申请公布日期 |
2007.02.23 |
申请号 |
HK20030107976 |
申请日期 |
2003.11.05 |
申请人 |
ZENITH ELECTRONICS CORPORATION |
发明人 |
BRETL, WAYNE, E.;CITTA, RICHARD, W.;MARK FIMOFF |
分类号 |
H04L;H03M13/25;H03M13/39;H04L1/00;H04L25/03;H04L25/06;H04L25/497;H04L27/02;H04L27/06;H04N5/04;H04N5/44;H04N5/455;H04N19/895 |
主分类号 |
H04L |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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