发明名称 |
Cache memory device, semiconductor integrated circuit, and cache control method |
摘要 |
A memory cache device in which a storage area used for a memory data protection function is effectively used at the time of not using the memory data protection function. A mode selection signal makes ECC code sections for storing an ECC code function as a storage area for storing ECC codes used for performing error detection or error correction on data stored in data RAMs at the time the memory data protection function is enabled and as a way added to the data RAMs at the time the memory data protection function is disabled.
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申请公布号 |
US2007044004(A1) |
申请公布日期 |
2007.02.22 |
申请号 |
US20050295562 |
申请日期 |
2005.12.07 |
申请人 |
FUJITSU LIMITED |
发明人 |
HINO MITSUAKI;NODOMI AKIRA |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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