| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To realize high speed external output operation synchronized with an external clock signal with respect to suppression of clock delay. <P>SOLUTION: The semiconductor integrated circuit has an external output buffer (53), a latch circuit (90) which latches data to be output from the external output buffer synchronously with an external clock signal (100), and a processing circuit (20) of data to be latched into the latch circuit. The latch circuit and the processing circuit input in common the output of a clock buffer (101) which receives the external clock signal. By performing the output latch operation of the latch circuit receiving a clock signal from the outside, it becomes possible to reduce the influence of internal clock delay in the output operation synchronized with the external clock signal. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
