发明名称 Compliant probes and test methodology for fine pitch wafer level devices and interconnects
摘要 A compliant interposer sheet probe card and a method for testing a wafer or a wafer level package using the probe card are described. Test electronic circuits are connected on one side of a multi-layer substrate. A top side of a compliant interposer sheet is connected to an opposite side of the multi-layer substrate. A wafer or a wafer level package to be tested is contacted with pins on a bottom side of the compliant interposer sheet whereby the wafer or wafer level package can be tested.
申请公布号 US2007040565(A1) 申请公布日期 2007.02.22
申请号 US20050207336 申请日期 2005.08.19
申请人 GEORGIA TECH RESEARCH COPORATION 发明人 JAYABALAN JAYASANKER;ROTARU MIHAI D.;IYER MAHADEVAN K.;ONG ANDREW T.A.
分类号 G01R31/26 主分类号 G01R31/26
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