| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device where an arrangement margin of respective elements constituting a transistor array is reduced and a chip size can be reduced, and to provide a manufacturing method of the device. SOLUTION: A plurality of bars of parallel channel stop regions 7 are formed on a surface of a silicon substrate 1, and element separation insulating films 4 are formed on the channel stop regions 7. Impurity diffusion regions 6 constituting a channel of conduction type opposite to the channel stop regions 7 are formed in regions separated by the element separation insulating films 4. Impurity diffusion regions 5 are formed with a similar and a different threshold conduction type as the impurity diffusion region 6, in at least partial cross schedule positions of the impurity diffusion regions 6 and a plurality of bars of gate electrodes 3 arranged in a direction crossing the impurity diffusion regions 6 through the gate insulating films 2 on an inner side of the impurity diffusion regions 6 in a plane view. Then, gate electrodes 3 are formed. COPYRIGHT: (C)2007,JPO&INPIT
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