发明名称 LOWER POWER ASSEMBLER
摘要 <p>A method for processing data using a time-stationary multiple-instruction word processing apparatus, arranged to execute a plurality of instructions in parallel, said method comprising the following steps: generating a set of multiple-instruction words (INS(i), INS(i+1), INS(i+2)), wherein each multiple-instruction word comprises a plurality of instruction fields, wherein each instruction field encodes control information for a corresponding resource of the processing apparatus, and wherein bit changes between an instruction field related to a no-operation instruction, and a corresponding instruction field of an adjacent multiple-instruction word are minimised; storing input data in a register file (RF0, RF1); processing data retrieved from the register file based on control information derived from the set of multiple-instruction words; disabling the write back of result data to the register file during execution of a no-operation instruction using a first dedicated no-operation code (ws00, ws10, wp00, wp10).</p>
申请公布号 EP1754143(A2) 申请公布日期 2007.02.21
申请号 EP20050739752 申请日期 2005.05.09
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 LEIJTEN, JEROEN, A., J.
分类号 G06F9/38;G06F9/30;G06F9/45 主分类号 G06F9/38
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