发明名称
摘要 <p>PROBLEM TO BE SOLVED: To miniaturize a picture signal processor for encoding/decoding a picture signal through the use of a main memory and to reduce cost. SOLUTION: A picture input/output block 4 thins Y, Cr and Cb data inputted in parallel by 4:2:2 into 4:1:1, multiplexes them and converts them into a data stream MUX-DATA of Y, Cr and Cb. Then, it is written into the main memory 6 through a buffer 5. Thus, data can be transferred by using the transmission line of one system. A compression/expansion block 7 encodes the data stream into a block unit, decodes input encoding data CMP-DATA and writes it into the main memory 6. A system control block mediates access to the main memory 6 by the respective blocks.</p>
申请公布号 JP3884830(B2) 申请公布日期 2007.02.21
申请号 JP19970222392 申请日期 1997.08.19
申请人 发明人
分类号 G06F12/00;H04N11/04;G06F12/02;G06T1/00;G06T9/00;H04N5/92;H04N9/804;H04N9/808 主分类号 G06F12/00
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