| 摘要 |
The digital matched filter according to the present invention comprises a storage circuit for accumulating received signals by an A/D converter without shifting the signals, an address signal generating circuit for controlling an address for accumulating output from the A/D converter there, a reference data generating circuit for generating spread code for receiving, a ring-formed shift register for shifting output from the reference data generating circuit, a multiplying circuit for multiplying output from the storage circuit not executing shifting by output from the shift register, an adding circuit for adding output from the multiplying circuit, and a timing signal generating circuit for controlling timing for the operations described above. |
