发明名称 Integrated circuit with improved interconnect structure and process for making same
摘要 A semiconductor die and an associated low resistance interconnect located primarily on the bottom surface of such die is disclosed. This arrangement provides a flexible packaging structure permitting easy interconnected with other integrated circuits; in this manner, a number of such circuits can be stacked to create high circuit density multi-chip modules. A process for making the device is further disclosed. To preserve structural integrity of a wafer containing such die during manufacturing, a through-hole via formed as part of the interconnect is filled with an inert material during operations associated with subsequent active device formation on such die.
申请公布号 US7179740(B1) 申请公布日期 2007.02.20
申请号 US20050029193 申请日期 2005.01.03
申请人 UNITED MICROELECTRONICS CORPORATION 发明人 HSUAN MIN-CHIH JOHN
分类号 H01L21/302;H01L21/461 主分类号 H01L21/302
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