发明名称 Method of fabricating MOS transistor having fully silicided gate
摘要 There is provided a method of fabricating a MOS transistor having a fully silicided gate, including forming a gate pattern and gate spacers on a semiconductor substrate, the gate pattern including a lower gate pattern, an insulating layer pattern, and an upper gate pattern, which are sequentially stacked. Source/drain regions are formed by implanting impurity ions into an active region using the gate pattern and the gate spacers as ion implantation masks. Then, a protecting layer is formed on the semiconductor substrate having the gate pattern, and the protecting layer is planarized until the upper gate pattern is exposed. Then, by removing the exposed upper gate pattern and the insulating layer pattern, the lower gate pattern is exposed. Then, the protecting layer is selectively removed, thereby exposing the source/drain regions. The exposed lower gate pattern is fully converted to a gate silicide layer, and a silicide layer is concurrently formed on the surfaces of the source/drain regions.
申请公布号 US7179714(B2) 申请公布日期 2007.02.20
申请号 US20050065242 申请日期 2005.02.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 CHANG YOU-JEAN;OH MYOUNG-HWAN;KANG HEE-SUNG;RYOU CHOONG-RYUL
分类号 H01L21/336;H01L21/28;H01L21/4763 主分类号 H01L21/336
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