发明名称 Tamper barrier for electronic device
摘要 A tamper protected printed circuit board assembly including a printed circuit board and a partially enveloping tamper wrap covering the entirety of the top surface of the printed circuit board and a first portion of the bottom surface of the printed circuit board, wherein a second portion of the bottom surface of the printed circuit board is not covered by the tamper wrap is provided. The printed circuit board includes two security trace layers each having two security traces thereon, preferably in a serpentine pattern. The tamper wrap and the security traces together cover and prevent tampering with the electronic circuitry of the printed circuit board.
申请公布号 US7180008(B2) 申请公布日期 2007.02.20
申请号 US20040868337 申请日期 2004.06.15
申请人 PITNEY BOWES INC. 发明人 HEITMANN KJELL A;CLARK DOUGLAS A;PERREAULT PAUL G
分类号 H01R12/04;G06F21/00;H05K1/02;H05K5/00 主分类号 H01R12/04
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