发明名称 Converting dual port memory into 2 single port memories
摘要 A circuit is configured as a splittable duplex memory cell or as a joinable single port memory pair based on the state of a programming layer. The programming layer has two states. In one state, the programming layer configures the circuit as a joinable single port memory pair. In the other state it configures the circuit as a splittable duplex memory cell. As such, the circuit can act as either a dual port memory cell or as two single port memory cells.
申请公布号 US7180819(B1) 申请公布日期 2007.02.20
申请号 US20050243622 申请日期 2005.10.04
申请人 LSI LOGIC CORPORATION 发明人 AGRAWAL GHASI R.
分类号 G11C8/00 主分类号 G11C8/00
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