发明名称 PLL circuit
摘要 A PLL circuit comprises a phase comparator for comparing phases between a reference signal and an internal signal and outputting a phase difference signal according to a phase difference therebetween, a voltage controlled oscillator group composed of a plurality of oscillators which have mutually different frequency variable ranges and whose oscillation frequencies are respectively controlled in accordance with a phase control signal, a selecting means for selecting one of the outputs from the plurality of oscillators based on the phase difference signal or the phase control signal, and a frequency divider for generating the internal signal by dividing an output of an oscillator selected by the selecting means, and when the oscillator selecting state is changed, an output phase of the frequency divider is approximated to the phase of the reference signal. Thereby, a required voltage controlled oscillator can be selected in a short time according to a desirable oscillation frequency.
申请公布号 US7180375(B2) 申请公布日期 2007.02.20
申请号 US20050535706 申请日期 2005.05.20
申请人 NEC CORPORATION 发明人 MAEDA TADASHI;MATSUNO NORIAKI;NUMATA KEIICHI
分类号 H03L7/06;H03L7/099;H03L7/10;H03L7/199 主分类号 H03L7/06
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