发明名称 Memory assembly for reducing power loss in integrated circuits e.g. for mobile radio subscriber units, has many switching units whereby data word is fed to input side of switching unit to which memory element is connected
摘要 <p>A data word is fed to input side of the switching unit (202), emitted at outlet of the switching unit with which memory element is connected, which addresses (1101) the address bits through the many supplied addresses. Each memory unit is arranged to store at least a data value which has at least a bit. Each memory element can be addressed by means of many address bits whereby the memory assembly has many switching elements. The switching elements going out from a data entry (211) of the switching assembly are arranged in a binary tree hierarchy in the direction of many outlets of the switching arrangement. Each memory unit, of the many memory units, is connected with the outlet of switching assembly whereby the switching assembly has many address accesses. When the many address bits are fed by means of many address accesses of the switching assembly, a data word is fed at the inlet side of the switching assembly.</p>
申请公布号 DE102005036267(A1) 申请公布日期 2007.02.15
申请号 DE20051036267 申请日期 2005.08.02
申请人 INFINEON TECHNOLOGIES AG 发明人 HACHMANN, ULRICH
分类号 G11C8/00 主分类号 G11C8/00
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