发明名称 |
Integrated circuit arrangements with ESD-resistant capacitor and corresponding method of production |
摘要 |
A circuit arrangement including a capacitor in an n-type well is disclosed. A specific polarization of the capacitor ensures that a depletion zone arises in the well and the capacitor has a high ESD strength. An optionally present auxiliary doping layer ensures a high area capacitance of the capacitor despite high ESD strength.
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申请公布号 |
US2007034959(A1) |
申请公布日期 |
2007.02.15 |
申请号 |
US20060502262 |
申请日期 |
2006.08.10 |
申请人 |
ESMARK KAI;GOSSNER HARALD;RUSS CHRISTIAN;SCHNEIDER JENS |
发明人 |
ESMARK KAI;GOSSNER HARALD;RUSS CHRISTIAN;SCHNEIDER JENS |
分类号 |
H01L23/62;H01L27/08;H01L29/94 |
主分类号 |
H01L23/62 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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