发明名称 |
MOS devices with reduced recess on substrate surface |
摘要 |
A MOS device having reduced recesses under a gate spacer and a method for forming the same are provided. The MOS device includes a gate structure overlying the substrate, a sidewall spacer on a sidewall of the gate structure, a recessed region having a recess depth of substantially less than about 30 Å underlying the sidewall spacer, and a silicon alloy region having at least a portion in the substrate and adjacent the recessed region. The silicon alloy region has a thickness of substantially greater than about 30 nm. A shallow recess region is achieved by protecting the substrate when a hard mask on the gate structure is removed. The MOS device is preferably a pMOS device.
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申请公布号 |
US2007034906(A1) |
申请公布日期 |
2007.02.15 |
申请号 |
US20050320012 |
申请日期 |
2005.12.27 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
WANG CHIH-HAO;WANG TA-WEI |
分类号 |
H01L29/768 |
主分类号 |
H01L29/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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