发明名称 |
Structure and method for forming inter-poly dielectric in a shielded gate field effect transistor |
摘要 |
A shielded gate trench FET is formed as follows. A trench is formed in a silicon region of a first conductivity type, the trench including a shield electrode insulated from the silicon region by a shield dielectric. An inter-poly dielectric (IPD) including a layer of thermal oxide and a layer of conformal dielectric is formed along an upper surface of the shield electrode. A gate dielectric lining at least upper trench sidewalls is formed. A gate electrode is formed in the trench such that the gate electrode is insulated from the shield electrode by the IPD.
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申请公布号 |
US2007037327(A1) |
申请公布日期 |
2007.02.15 |
申请号 |
US20050201400 |
申请日期 |
2005.08.09 |
申请人 |
HERRICK ROBERT;PROBST DEAN;SESSION FRED |
发明人 |
HERRICK ROBERT;PROBST DEAN;SESSION FRED |
分类号 |
H01L21/84 |
主分类号 |
H01L21/84 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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