| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a clock supply circuit capable of supplying clock signals such that the time to wait for oscillation stabilization is short. <P>SOLUTION: The clock supply circuit is provided having a filter 111 for outputting second clock signals by removing pulses whose pulse widths are shorter than a threshold within first clock signals, while allowing pulses whose pulse widths are longer than the threshold to pass through; and a divider 112 for dividing the second clock signals to output third clock signals. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
