| 摘要 |
A differential signal receiver has a common mode suppression circuit having resistive inputs (R1, R2), and a current mirror circuit (M1-M8) to generate a corrective signal from one input and combine it with a signal from the other of the resistive inputs. The resistive inputs mean input range is no longer limited to the supply rails, and the corrective signal enables common mode suppression without attenuation of the differential component. The current mirror has a transistor in each input path, so that a voltage drop across a first of the input resistors is coupled to a gate or base of the transistor in the other of the input paths. The characteristics of the transistors and the values of the resistors are selected so that the corrective signal has an amplitude and timing to suppress the common mode component. It can be used for LVDS signals.
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