| 摘要 |
Disclosed is a device and method for configuring a register in a PLD to operate as a logical AND gate. So configuring a register allows it to be used in a multiplication carried out by the PLD. A logic element includes a combinatorial logic section and at least one register interconnected with the combinatorial logic section. The register is configured to operate as a logical AND gate. The logic element can include a data input, a clear input, and a load input wherein the load input can be held high, a first bit to be ANDed can be input on the data input and a second bit to be ANDed can be input on the clear input. The logic element can, for example be configured to carry out at least a portion of a multiplication of a multiplicand and a multiplier.
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