发明名称 Error correction code decoding device
摘要 In an error correction code decoding apparatus, utilized in the decoding of turbo codes, plural number of backward processing modules 100, 110 and 120 are provided. In one backward processing module, received data and a priori information are periodically read in the reverse order from memories 140 and 150 to calculate backward values. The other backward processing modules are supplied with received data and the a priori information, output from the preset other backward processing module to calculate backward values. The backward processing module reading in from the memories is cyclically changed. A forward processing and soft-output generating module 130 generates a soft-output by exploiting the backward values calculated by the backward processing module which lies directly ahead of the backward processing module reading in the data from the memories.
申请公布号 US7178090(B2) 申请公布日期 2007.02.13
申请号 US20020293308 申请日期 2002.11.14
申请人 NEC CORPORATION 发明人 OKAMURA TOSHIHIKO;ANADA HIROAKI
分类号 G06F11/10;H03M13/45;H03M13/27;H03M13/29;H03M13/41;H04L1/00 主分类号 G06F11/10
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