Controlling multiple signal polarity in a semiconductor device

摘要

A method and apparatus for controlling multiple signal polarity in a memory device. A desired active state signal polarity of at least one signal pad of a device is compared to a default active state signal polarity allocated to the at least one signal pad. The desired and default active state signal polarities have either a high active state or a low active state. The active state signal polarity of the at least one signal pad is reversed in response to the desired active state signal polarity differing from the default active signal polarity.