| 摘要 |
A semiconductor memory device comprises a memory array on a semiconductor substrate having a constitution such that a plurality of memory cells (Mc) where one end of the variable resistive element (Rc) is connected to either an emitter or a collector of a bipolar transistor (Qc) are arranged in the row and the column directions in a matrix form, the other of the emitter or the collector of the bipolar transistor (Qc) in each memory cell in the same column is connected to common source lines (S1, S2) extending in column direction, a base of the bipolar transistor (Qc) in each memory cell in the same row is connected to common word lines (W1, W2) extending in row direction, the other end of the variable resistive element (Rc) in each memory cell in the same column is connected to common bit lines (B1, B2) extending in column direction. |
