发明名称 Nand flash memory with erase verify based on shorter evaluation time
摘要 A non-volatile memory device is proposed. The non-volatile memory device includes a plurality of memory cells each one having a programmable threshold voltage, and means for reading a set of selected memory cells with respect to a plurality of reference voltages, for each selected memory cell the means for reading including means for charging a reading node associated with the selected memory cell with a charging voltage, means for biasing the selected memory cell with a biasing voltage, means for connecting the charged reading node with the biased selected memory cell, and means for sensing a voltage at the reading node after a predefined delay from the connection, for at least a first one of the reference voltages the biasing voltage being a first biasing voltage equal to the first reference voltage and the delay being a common first delay, wherein for at least a second one of the reference voltages the biasing voltage is a second biasing voltage different from the second reference voltage, and the delay is a second delay different from the first delay.
申请公布号 US2007030730(A1) 申请公布日期 2007.02.08
申请号 US20060495886 申请日期 2006.07.28
申请人 STMICROELECTRONICS S.R.I. 发明人 BOVINO ANGELO;MICHELONI RINO;RAVASIO ROBERTO
分类号 G11C16/06 主分类号 G11C16/06
代理机构 代理人
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