发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor memory device that can reduce the number of masks used for the formation of a lower electrode link and a bit line contact link and control the increases of these resistances. <P>SOLUTION: The method for manufacturing the semiconductor memory device uses a technology that secures an alignment error margin by utilizing a self-alignment photoresist mask which is located above a source region 205 located on interlayer dielectric film 230 formed on the whole surface of a substrate 200, extends in the direction that a gate G12 extends, and exposes only one part of the interlayer dielectric film in a line shape; and forms the bit line contact link 216a and a lower electrode link 228a, which links a bit line and a capacity lower electrode to an active region of the semiconductor substrate. The bit line contact link and the lower electrode link are each formed by utilizing one mask process. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007036278(A) 申请公布日期 2007.02.08
申请号 JP20060263376 申请日期 2006.09.27
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KIN CHISHU;KIM JEONG-SEOK;SHIN KEISHO
分类号 H01L21/768;H01L21/8242;H01L27/108 主分类号 H01L21/768
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