发明名称 |
Active memory processing array topography and method |
摘要 |
An integrated active memory device includes an array of processing elements coupled to a dynamic random access memory device and to a component supplying instructions to the processing elements. The processing elements are logically arranged in a plurality of logical rows and logical columns. The array is logically folded to minimize the length of the longest path between processing elements by physically interleaving the processing elements so that the processing elements in different logical rows a physically interleaved with each other and the processing elements in different logical columns a physically interleaved with each other.
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申请公布号 |
US2007033379(A1) |
申请公布日期 |
2007.02.08 |
申请号 |
US20060544686 |
申请日期 |
2006.10.06 |
申请人 |
KIRSCH GRAHAM |
发明人 |
KIRSCH GRAHAM |
分类号 |
G06F15/00;G06F15/173;G06F15/80;G11C7/10;G11C11/4097 |
主分类号 |
G06F15/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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