发明名称 |
Bit synchronization circuit with phase tracking function |
摘要 |
A bit synchronization circuit comprising an initial phase determining unit for rapidly determining, during a period of receiving a preamble of burst data, a clock with a phase synchronized with received burst data from among multi-phase clocks having the same frequency as an internal reference clock and a phase tracking unit for modifying the synchronized phase clock responsive to phase variation of received data during a period of receiving a payload of burst data by taking the synchronized phase clock determined by the initial phase determining unit as an initial phase. The bit synchronization circuit retimes burst data with a data retiming clock having a predetermined phase relation with the synchronized phase clock and outputs the burst data in synchronization with the internal reference clock.
|
申请公布号 |
US2007030937(A1) |
申请公布日期 |
2007.02.08 |
申请号 |
US20050299819 |
申请日期 |
2005.12.13 |
申请人 |
HITACHI COMMUNICATION TECHNOLOGIES, LTD. |
发明人 |
YAJIMA YUSUKE;KAZAWA TOHRU;ASHI YOSHIHIRO |
分类号 |
H03D3/24 |
主分类号 |
H03D3/24 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|