Method of programming a four-level flash memory device and a related page buffer

摘要

When the threshold voltage of a cell of a four-level FLASH memory device, that includes an array of singularly addressable preliminarily erased memory cells each capable of storing a two-bit datum, is verified to have reached the desired distribution, the cell is read using a test read voltage smaller than or equal to the program voltage. In this situation the voltage V S on the source node is surely negligible and the programmed state of the cell may be correctly verified. A novel architecture of a page buffer is also provided.