发明名称 |
Polish method for semiconductor device planarization |
摘要 |
A polish method for planarization is disclosed. The method uses a combination of a traditional oxide CMP and HSP-CMP (High Selectivity and Planarization) with a fix abrasive pad to meet the requirements of the CMP process for a device feature dimension under 0.18 micron even to 0.09 micron. By using a first polish step with a conventional polish pad and an oxide polish slurry, the non-uniformity of the over-fill thickness of the STI dielectric layer can be firstly removed and a much more smooth and uniform topography favorable for the HSP-CMP process the fix abrasive polishing pad can be obtained. Then the HSP-CMP process with the fix abrasive polishing pad can be performed to provide a planarized surface with accurate dimension control.
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申请公布号 |
US7172970(B2) |
申请公布日期 |
2007.02.06 |
申请号 |
US20030384641 |
申请日期 |
2003.03.11 |
申请人 |
UNITED MICROELECTRONICS CORP. |
发明人 |
LIN ZONG HUEI;YU ART;HSU CHIA RUNG;TSAI TENG-CHUN |
分类号 |
H01L21/461;H01L21/3105;H01L21/469;H01L21/762;H01L21/768 |
主分类号 |
H01L21/461 |
代理机构 |
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地址 |
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