| 摘要 |
Disclosed is a memory device, which combines a self-refresh enable signal and a power mode decision signal and prevents an internal voltage from being dropped down without the increase of IDD3P current when the memory device performs a self-refresh operation. The memory device includes an operation mode internal voltage generator used in an operation mode, and a controller for enabling the operation mode internal voltage generator while performing a self-refresh operation with a predetermined period and activating a memory cell array of the memory device, even when the memory device is in a stand-by mode.
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