| 摘要 |
A phase change memory device and its manufacturing method are provided to reduce the current necessary for a phase change layer by decreasing a phase change region using an improved arrangement of the phase change layer. An interlayer dielectric(22) is formed on a semiconductor substrate(21) with a predetermined lower structure including a transistor. A lower electrode(24) is formed like a plug type structure in the interlayer dielectric to contact the transistor. An insulating layer(25) and an upper electrode(26) are stacked on the resultant structure to expose a predetermined portion of the lower electrode to the outside. A phase change layer(27) is formed like a spacer type structure at a sidewall of the stacked structure composed of the insulating layer and the upper electrode and on the exposed lower electrode.
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