发明名称 FERROELECTRIC RANDOM ACCESS MEMORY DEVICE
摘要 A ferroelectric RAM device is provided to increase an effective channel length by forming an improved dual gate cell structure by using upper and lower gates formed in a groove of a semiconductor substrate. A groove is formed within a gate forming region of a semiconductor substrate(SUB). A first gate electrode(GM1) is formed along an inner surface of the groove. A first gate insulating layer(OX1) is formed on the first gate electrode. A channel layer(CH) is formed along an upper surface of the resultant structure. A second gate insulating layer(OX2) is formed on the channel layer of the groove portion. A ferroelectric film(FL) is formed on the second gate insulating layer. A second gate electrode(GM2) is formed on the ferroelectric film.
申请公布号 KR100680978(B1) 申请公布日期 2007.02.02
申请号 KR20060040728 申请日期 2006.05.04
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, HAE CHAN;HONG, SUK KYOUNG
分类号 H01L27/105 主分类号 H01L27/105
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