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发明名称
积体电路晶片加入制造监测的方法
摘要
本发明系关于一种积体电路、设计此积体电路之方法及系统及其制造方法。此方法包含:(a)产生积体电路之积体电路设计之一光罩层级设计,光罩层级设计包含多个积体电路元件形状;(b)在邻近的积体电路元件形状之间,标定光罩层级设计区域,且根据填塞形状规则,标定区域足够大到需要在邻近积体电路元件之间置放填塞形状,填塞形状不为积体电路操作所需;以及(c)在至少一个标定区域内,置放一或多个监测结构之一或多个监测结构形状,而监测结构不为积体电路操作所需。
申请公布号
TW200705229
申请公布日期
2007.02.01
申请号
TW095111771
申请日期
2006.04.03
申请人
万国商业机器公司
发明人
詹姆斯W 阿达克森;葛瑞格 贝赞;约翰M 柯恩;马修S. 葛瑞帝;汤玛斯S. 索恰克;大卫P. 法雷特
分类号
G06F17/50(2006.01)
主分类号
G06F17/50(2006.01)
代理机构
代理人
蔡玉玲
主权项
地址
美国
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