发明名称 All MOS power-on-reset circuit
摘要 A reliable, integrated POR (power-on-reset) circuit with a compact and small area. In one set of embodiments, the POR circuit comprises NMOS and PMOS devices, where a combination of the respective threshold voltages of the NMOS and PMOS devices is used to set the POR threshold. The NMOS and PMOS devices may be coupled in a configuration resulting in a POR threshold that is a function of the PMOS threshold voltage and a scaled version of the NMOS threshold voltage. The scaling factor may be a function of the transconductance parameters of the NMOS and PMOS devices. Additional NMOS devices may be configured in the POR circuit to provide hysteresis functionality, with one of the NMOS devices coupling to one of the original NMOS devices. The scaling factor used in determining the POR threshold in case of a falling supply voltage may then be a function of the transconductance parameters of the original NMOS and PMOS devices and the additional NMOS device coupling to one of the original NMOS devices.
申请公布号 US2007024332(A1) 申请公布日期 2007.02.01
申请号 US20050192152 申请日期 2005.07.28
申请人 STANDARD MICROSYSTEMS CORPORATION 发明人 MCLEOD SCOTT C.
分类号 H03L7/00 主分类号 H03L7/00
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