发明名称 LITHOGRAPHY SIMULATION METHOD, MASK PATTERN FORMING METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To predict a finish dimension into which dimensional changes in a semiconductor lithographic process are incorporated with high accuracy at a high speed. <P>SOLUTION: A degree of denseness between a pattern as an object of prediction and a pattern in the surrounding area in a region of a substrate surface is calculated from design data; and according to the calculated degree of denseness, a relative positional relation between an intensity distribution curve of energy rays constituting a latent image and a referential intensity line to specify an edge position of the object pattern for prediction is locally changed in at least a part corresponding to the above object pattern for prediction. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007025034(A) 申请公布日期 2007.02.01
申请号 JP20050204146 申请日期 2005.07.13
申请人 TOSHIBA CORP 发明人 KOTANI TOSHIYA;NOJIMA SHIGEKI;SANHONGI SHOJI
分类号 G03F1/36;G03F1/68;G03F1/70;G03F7/20;H01L21/027 主分类号 G03F1/36
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