发明名称 POST LAST WIRING LEVEL INDUCTOR USING PATTERNED PLATE PROCESS
摘要 A method of forming a semiconductor structure, and the semiconductor structure so formed, wherein a transmission line, such as an inductor, is formed on a planar level above the surface of a last metal wiring level.
申请公布号 US2007026659(A1) 申请公布日期 2007.02.01
申请号 US20050161217 申请日期 2005.07.27
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHINTHAKINDI ANIL K.;COOLBAUGH DOUGLAS D.;FLORKEY JOHN E.;GAMBINO JEFFREY P.;HE ZHONG-XIANG;STAMPER ANTHONY K.;VAED KUNAL
分类号 H01L21/44;H01L21/20;H01L21/4763 主分类号 H01L21/44
代理机构 代理人
主权项
地址