| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a technology whereby timing can accurately be set between LSIs operated at a high speed. <P>SOLUTION: This delay circuit includes: a first delay element 8 whose delay time accompanied by signal propagation is controlled by a delay time control signal; a second delay element 8 including a phase inversion element 9 for inverting the phase of the signal and receiving supply of the delay time control signal Vcntl from a frequency variable oscillator 2; and an adjustment element 10 connected in series with the second delay element 8 and through which the signal is propagated, and the total delay time of the signal passing through the second delay element 8 and the adjustment element 10 is adjusted. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
