| 摘要 |
PROBLEM TO BE SOLVED: To make a flip-flop circuit, which is composed of an input part using a dynamic circuit and an output part using a static circuit and takes in data in a pulse width period shorter than a clock cycle, reduced in area and high in oerating speed simultaneously. SOLUTION: As for the flip-flop circuit with scan, in an input part 10 composed of a dynamic circuit, only three N-type transistors (N20, N21 and N3 or N22, N23 and N3) are connected in series. A data signal D is directly inputted to the N-type transistor N21. On the other hand, a test input signal SI is inputted to an AND/OR inverter circuit AOI2. A potential of a node CKD passing a clock signal CK through two inverter circuits INV1, INV2 is controlled to said AND/OR inverter circuit AOI2 as a control signal. A hold restriction time may be reduced for the test input signal SI. COPYRIGHT: (C)2007,JPO&INPIT
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