发明名称 Method for manufacturing semiconductor devices
摘要 A method for manufacturing semiconductor devices includes a step of etching a sample including an interlayer insulating layer containing Al<SUB>2</SUB>O<SUB>3 </SUB>and a polysilicon or SiO<SUB>2 </SUB>layer in contact with the interlayer insulating layer using a plasma etching system. The interlayer insulating layer is etched with a gas mixture containing BCl<SUB>3</SUB>, Ar, and CH<SUB>4 </SUB>or He. The gas mixture further contains Cl<SUB>2</SUB>. The interlayer insulating layer is etched in such a manner that a time-modulated high-frequency bias voltage is applied to the sample. The interlayer insulating layer is etched in such a manner that the sample is maintained at a temperature of 100° C. to 200° C. The interlayer insulating layer and the polysilicon or SiO<SUB>2 </SUB>layer are separately etched in different chambers.
申请公布号 US2007026611(A1) 申请公布日期 2007.02.01
申请号 US20050209653 申请日期 2005.08.24
申请人 SAITO GO;NISHIDA TOSHIAKI;SHIMOMURA TAKAHIRO;ARASE TAKAO 发明人 SAITO GO;NISHIDA TOSHIAKI;SHIMOMURA TAKAHIRO;ARASE TAKAO
分类号 H01L21/336;H01L21/302 主分类号 H01L21/336
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