| 摘要 |
A method for fabricating a semiconductor device is provided to fabricate a TFT with a different characteristic and an interconnection with different size and shape by processing a conductive layer or insulation layer that has a different shape according to desired capabilities in the same process. A gate insulation layer is formed on first and second semiconductor layers. First and second conductive layers(364,365) are sequentially formed on the resultant structure. First and second mask layers are respectively formed on the second conductive layer on the first and the second semiconductor layers. The first and second conductive layers are etched to form first, second, third and fourth gate electrode layers. Impurity elements of one conductivity type are respectively added to the first and the second semiconductor layers by using the first and the second gate electrode layers as a mask and the third and fourth gate electrode layers as a mask. A first high-density impurity region and a first low-density impurity region overlapping the first gate electrode layer are formed in the first semiconductor layer, and a second high-density impurity region and a second low-density impurity region overlapping the third gate electrode layer are formed in the second semiconductor layer. A third mask layer is formed on the second semiconductor layer, the third gate electrode layer and the fourth gate electrode layer. In the first gate electrode layer, a region overlapping the first low-density impurity region is eliminated by using the third mask layer and the second gate electrode layer as a mask. |
