| 摘要 |
A semiconductor memory device is provided to shorten read time by reducing the number of read operations and to store larger amount of data. First and second cell arrays(1t,1c) are arranged with a plurality of electrically erasable and programmable nonvolatile memory cells, respectively. A sense amplifier circuit(3) is constituted to read data of the first and second cell arrays. Each cell array has a plurality of information cells and at least one reference cell, and one of four data levels is written in the information cell, and a reference level used to detect the data level of the information cell is written in the reference cell. The sense amplifier circuit detects the cell current different between the information cell and the reference cell at the same time from one and the other of the first and second cell arrays.
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