发明名称 |
Semiconductor device |
摘要 |
A technology for easily forming a multi-layer wiring structure that is fine and reliable. In the multi-layer wiring structure, the lower-layer wiring and the upper-layer wiring that are formed to sandwich an insulating layer are electrically connected to each other in a projection formed in the lower-layer wiring. The projection includes a columnar conductive member and the upper and lower layers thereof and each of the lower layer and the upper layer is formed of a conductive layer formed over the entire lower-layer wiring. The upper-layer is electrically connected to the lower-layer wiring in the portion where the projection is exposed substantially on the same plane as the top surface of the insulating layer.
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申请公布号 |
US7170176(B2) |
申请公布日期 |
2007.01.30 |
申请号 |
US20040976882 |
申请日期 |
2004.11.01 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
ISHIKAWA AKIRA;YAMAGUCHI TETSUJI |
分类号 |
H01L21/3205;H01L23/52;G02F1/1362;H01L21/768;H01L21/77;H01L21/84;H01L27/12;H01L29/417 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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